Karfa, Chandan: search on Z-Library

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1

[IEEE 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE) - Grenoble, France (2020.3.9-2020.3.13)] 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE) - Is Register Transfer Level Locking Secure?

Karfa, Chandan, Chouksey, Ramanuj, Pilato, Christian, Garg, Siddharth, Karri, Ramesh

Year:

2020

File:

PDF, 291 KB

2020

2

[IEEE 2020 24th International Symposium on VLSI Design and Test (VDAT) - Bhubaneswar, India (2020.7.23-2020.7.25)] 2020 24th International Symposium on VLSI Design and Test (VDAT) - Automatic Inverse Operation Detection and its Impact in High-level Synthesis

Kalita, Pankaj Kumar, Chouksey, Ramanuj, Karfa, Chandan

Year:

2020

File:

PDF, 280 KB

2020

3

[IEEE 15th International Conference on Advanced Computing and Communications (ADCOM 2007) - Guwahati, Assam, India (2007.12.18-2007.12.21)] 15th International Conference on Advanced Computing and Communications (ADCOM 2007) - Verification of Data-path and Controller Generation Phase of High-level Synthesis

Karfa, Chandan, Sarkar, Dipankar, Mandal, Chittaranjan

Year:

2007

Language:

english

File:

PDF, 262 KB

english, 2007

4

[IEEE 2014 IEEE Students' Technology Symposium (TechSym) - Kharagpur (2014.2.28-2014.3.2)] Proceedings of the 2014 IEEE Students' Technology Symposium - On multi-cycle path support in model based high-level synthesis

Karfa, Chandan, Jain, Sheetal

Year:

2014

Language:

english

File:

PDF, 964 KB

english, 2014

5

Verification of Scheduling of Conditional Behaviors in High-Level Synthesis

Chouksey, Ramanuj, Karfa, Chandan

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

2020

File:

PDF, 2.37 MB

2020

6

[ACM Press the 5th IBM Collaborative Academia Research Exchange Workshop - New Delhi, India (2013.10.17-2013.10.19)] Proceedings of the 5th IBM Collaborative Academia Research Exchange Workshop on - I-CARE '13 - Experimentation with SMT solvers and theorem provers for verification of loop and arithmetic transformations

Karfa, Chandan, Banerjee, K., Sarkar, D., Mandal, C.

Year:

2013

Language:

english

File:

PDF, 115 KB

english, 2013

7

[IEEE 2010 IEEE Computer Society Annual Symposium on VLSI (ISVLSI) - Lixouri, Greece (2010.07.5-2010.07.7)] 2010 IEEE Computer Society Annual Symposium on VLSI - Data-Flow Driven Equivalence Checking for Verification of Code Motion Techniques

Karfa, Chandan, Sarkar, Dipankar, Mandal, Chittaranjan

Year:

2010

Language:

english

File:

PDF, 193 KB

english, 2010

8

[ACM Press the 40th International Conference - Gothenburg, Sweden (2018.05.27-2018.06.03)] Proceedings of the 40th International Conference on Software Engineering Companion Proceeedings - ICSE '18 - Automatic detection of inverse operations while avoiding loop unrolling

Banerjee, Kunal, Chouksey, R., Karfa, Chandan, Kalita, Pankaj

Year:

2018

File:

PDF, 1.30 MB

2018

9

Verification of Loop and Arithmetic Transformations of Array-Intensive Behaviors

Karfa, Chandan, Banerjee, Kunal, Sarkar, Dipankar, Mandal, Chittaranjan

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2013

Language:

english

File:

PDF, 5.35 MB

english, 2013

10

[IEEE 2012 International Symposium on Electronic System Design (ISED) - Kolkata, India (2012.12.19-2012.12.22)] 2012 International Symposium on Electronic System Design (ISED) - A Value Propagation Based Equivalence Checking Method for Verification of Code Motion Techniques

Banerjee, Kunal, Karfa, Chandan, Sarkar, Dipankar, Mandal, Chittaranjan

Year:

2012

Language:

english

File:

PDF, 195 KB

english, 2012

11

[IEEE 2015 6th Asia Symposium on Quality Electronic Design (ASQED) - Kula Lumpur, Malaysia (2015.8.4-2015.8.5)] 2015 6th Asia Symposium on Quality Electronic Design (ASQED) - Automatic register balancing in model-based high-level synthesis

Year:

2015

Language:

english

File:

PDF, 156 KB

english, 2015

12

Counter-example generation procedure for path-based equivalence checkers

Chouksey, Ramanuj, Karfa, Chandan, Banerjee, Kunal, Kalita, Pankaj Kumar, Bhaduri, Purandar

Journal:

Year:

2019

File:

PDF, 1.67 MB

2019

13

An Equivalence-Checking Method for Scheduling Verification in High-Level Synthesis

Chandan Karfa, Sarkar, D., Mandal, C., Kumar, P.

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2008

Language:

english

File:

PDF, 378 KB

english, 2008

14

Formal verification of code motion techniques using data-flow-driven equivalence checking

Karfa, Chandan, Mandal, Chittaranjan, Sarkar, Dipankar

Journal:

ACM Transactions on Design Automation of Electronic Systems

Year:

2012

Language:

english

File:

PDF, 803 KB

english, 2012

15

[ACM Press the 17th great lakes symposium - Stresa-Lago Maggiore, Italy (2007.03.11-2007.03.13)] Proceedings of the 17th great lakes symposium on Great lakes symposium on VLSI - GLSVLSI '07 - Hand-in-hand verification of high-level synthesis

Karfa, Chandan, Sarkar, Dipankar, Mandal, Chittaranjan, Reade, Chris

Year:

2007

Language:

english

File:

PDF, 606 KB

english, 2007

16

Verification of Code Motion Techniques Using Value Propagation

Banerjee, Kunal, Karfa, Chandan, Sarkar, Dipankar, Mandal, Chittaranjan

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2014

Language:

english

File:

PDF, 698 KB

english, 2014

17

Translation Validation of Code Motion Transformations Involving Loops

Chouksey, Ramanuj, Karfa, Chandan, Bhaduri, Purandar

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2018

Language:

english

File:

PDF, 379 KB

english, 2018

18

Applications of behavioural transformations in embedded system design

Journal:

IETE Technical Review

Year:

2012

Language:

english

File:

PDF, 718 KB

english, 2012

19

[IEEE 2013 26th International Conference on VLSI Design: concurrently with the 12th International Conference on Embedded Systems - Pune, India (2013.01.5-2013.01.10)] 2013 26th International Conference on VLSI Design and 2013 12th International Conference on Embedded Systems - Verification of KPN Level Transformations

Karfa, Chandan, Sarkar, Dipankar, Mandal, Chittaranjan

Year:

2013

Language:

english

File:

PDF, 271 KB

english, 2013

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